Today's microcontrollers (MCUs) incorporate on-chip non-volatile electrically erasable programmable read-only memory (EEPROM) to provide the programmer with even greater flexibility in developing applications programs. These MCUs allow the programmer to write a program into the EEPROM and, if desired, later electrically erase and revise the program. Accordingly, MCUs having self-programming capabilities may alter (program or erase) the contents of the EEPROM during the normal course of CPU operation. If the supply voltage (V.sub.DD) falls below specification levels, while the MCU is still in the operational mode, faulty data may be written into the EEPROM, or locations in the EEPROM may be improperly erased. Consequently, the data integrity of the EEPROM may be compromised when the supply voltage falls below the specification level.
Known MCUs employ various measures to alleviate this problem. For example, the Motorola MC6805P2 MCU uses an Low Voltage Inhibit (LVI) circuit to reset the entire system when the voltage falls below a specified level. This approach requires; however, that the CPU stop all program execution while the entire system is reset. Alternatively, MCUs such as the Motorola MC68HC05A6 use external stimulus for programming the on-chip EEPROM. Accordingly, an external pin is required to provide the EEPROM with the program control signal. Thus, it is desirable to provide an EEPROM protection scheme capable of overcoming the foregoing problems.